In many modem memory arrangements for computer systems and other electronic data processing systems, the memory arrangement is not driven via parallel application of data signals, address signals and control signals, as in typical conventional memory arrangements, but rather via data packets that are transmitted at high speed and at high frequency, in accordance with a predefined protocol, between, for example, a computer system and an interface of the memory arrangement. These data packets may contain write data, read data, addressing data, and command data.
Data packets that, for example, are sent from a computer system to the memory arrangement, are received and decoded by the interface of the memory arrangement. In accordance with the predefined protocol, the received data are interpreted and processed as commands, address data, or write data. In comparable manner, read data can also be coded into data packets by the interface and transmitted to, for example, a computer system.
The memory arrangement of such a type comprises several memory banks that can be accessed via several memory-bank access devices and that each include a plurality of memory cells.